Apple September 9 Event Preview: A20 Pro Chip's 2nm Die Photo Leaks
Apple is set to hold an event on September 9. Ahead of the launch, the first front-side die photo of the A20 Pro chip has leaked, revealing a 2nm process and WMCM packaging. The chip features more GPU cores and a larger neural engine than the A19 Pro, while retaining a 2+4 CPU configuration. L2 caches and memory bus width have been upgraded, with LPDDR5X memory placed beside the SoC die.
Apple will hold its product event on September 9. The first front-side die photo of the A20 Pro chip has surfaced, showing that the chip is built on a 2nm process and adopts WMCM (wafer-level multi-chip module) packaging, replacing the previous InFO_PoP scheme. The photo indicates an increase in GPU core count and a larger neural engine capacity compared with the A19 Pro. The CPU configuration remains unchanged, still featuring two performance cores and four efficiency cores, with operating frequencies yet to be disclosed.
The performance cores' L2 cache is 16MB, matching the A19 Pro, while the efficiency cores' L2 cache has been raised from 6MB to 8MB. The memory bus width has been expanded to 96 bits, continuing with LPDDR5X standard, and the memory die is placed beside the SoC die rather than stacked on top of it. This design boosts memory bandwidth without switching to LPDDR6. For now, the die photo does not label modules such as the neural engine or ISP, and further chip details remain undisclosed.