Intel Unveils 18A-P Process Details: GAA and Backside Power Boost Performance by 9%, Cut Power by 18%

Intel revealed further details of its 18A-P process technology at the Hot Chips conference. The process introduces gate-all-around (GAA) transistors, backside power delivery (GAA-BSPD), Power Boost technology, and additional metal layers, enabling up to a 30% frequency increase at low voltage on production x86 silicon.

The process is not a simple iteration of 18A but is designed to improve energy efficiency at low voltage and performance at high voltage. Compared with 18A, 18A-P delivers over 9% higher performance at the same power, or over 18% lower power at the same performance. It also introduces advanced strain engineering to enhance carrier mobility and expands the RibbonFET product line with Power Boost technology for AI, mobile, and data center applications.

GAA with backside power is currently at the first step of its development curve, with measured improvements of 30% at low voltage and double-digit gains at high voltage on production silicon. Diamond Rapids and Nova Lake will be the first products to adopt 18A-P, while ruthenium interconnects and stacked logic remain on the future roadmap.

GAA transistor technology benefits most in the low-voltage range, while backside power technologies such as PowerVia demonstrate their potential at high voltage by routing power from the wafer backside rather than the front-side wiring layers. The 30% figure comes from direct measurement: CPU cores built on the GAA backside-power process were compared with equivalent FinFET cores across the operating voltage range. At 0.5V, the core frequency improved by 30%. The comparison was conducted at the same voltage and core level, isolating the process contribution from architectural changes.

RibbonFET's gate wraps around the transistor channel from four sides, allowing Intel to control lower threshold voltages more precisely. Moving power wiring to the wafer backside reduces IR drop, lowering voltage loss. It helps at low voltage, but at high voltage, where larger voltage drop events occur, backside power is highly effective in reducing supply loss. Combining backside power with GAA is not accidental; it merges two complementary technologies, providing advantages at both high and low voltages.

On 18A, Intel already demonstrated backside power converting device gain into core frequency improvements: 5% at 1.1V and 7.5% at 0.95V. 18A-P further expands the RibbonFET product line with device options optimized for different design goals: W1 and W1.5 for low-power, low-capacitance devices, and W3P with Power Boost for high-performance applications, achieving a 10% speed increase without adding electrical load. Compared with 18A, 18A-P reduces external resistance by 20% for NMOS devices and 12% for PMOS devices, while achieving higher current and frequency at matched capacitance.

Building on the thermal management innovations introduced in 18A, 18A-P improves thermal performance through material enhancements and advanced EDA-driven thermal solutions. It increases the thermal conductivity of the bonded stack by 50%, improving overall stack thermal resistance by 20% to 40%.

Intel is also evaluating advanced materials and packaging technologies to extend its roadmap. Subtractive ruthenium interconnects with air-gap structures, demonstrated in Intel's VLSI research, reduce capacitance by about 35% compared with copper interconnects, with the advantage growing at fine pitches. Copper requires resistive barrier layers that cannot be scaled down, and copper resistance increases nonlinearly at small dimensions due to grain-boundary effects, while ruthenium remains linear at the same pitch, making it advantageous where wire resistance limits frequency. Looking further ahead, Intel is researching z-axis stacked logic, where one logic device is stacked on another, allowing signals to travel short vertical distances instead of long planar routes, a development directly linked to high-voltage scaling performance.

Diamond Rapids will be among the first major products to use 18A-P. Intel said development actually began with the previous Xeon 6+ "Clearwater Forest" generation, enabling the team to extend the E-core performance-per-watt advantages to Diamond Rapids' P-cores. Diamond Rapids can be configured with up to 256 cores, double the previous generation, requiring stronger memory bandwidth. Intel moves the IO modules to the center of the package to provide uniform memory access latency for every core, critical for AI-scale workloads, and the frequency headroom from 18A-P will directly translate into higher single-core performance.

Intel researcher Eric Fetzer said: "This is what you will see on Diamond Rapids. Everything starts with the underlying core technology. We leverage 18A-P advantages to increase both core count and core performance, then provide sufficient data through architecture upgrades."

Overall, GAA with backside power is seen as the first step in Intel's roadmap toward multi-generation single-core performance leadership. This begins with 18A-P, which delivers a 30% improvement at low voltage and double-digit gains at high voltage, verified on production silicon, with products including the Diamond Rapids Xeon series and the Nova Lake "Core" series planned for 2027.