NAURA Unveils 3D DRAM Etching Breakthrough with 500:1 Selectivity, Bypassing EUV Limits

NAURA has published an academic paper in an IEEE journal revealing a breakthrough in the manufacturing process for 3D DRAM, the next-generation memory chip, with the development of a two-step cyclic etching technique. As Western export controls on semiconductor equipment to China tighten, access to advanced extreme ultraviolet (EUV) lithography machines has become restricted. In conventional DRAM manufacturing, EUV lithography is used to carve fine circuit patterns on a two-dimensional plane; without EUV equipment, relying solely on deep ultraviolet (DUV) tools to shrink line widths horizontally faces multiple physical and process constraints. 3D DRAM is seen as the next stage in DRAM evolution, with its core concept being a shift to a vertical manufacturing architecture, stacking transistors layer by layer to increase memory cell density, similar to the path NAND flash took in moving to 3D stacking.

The paper focuses on a 64-layer 3D DRAM structure with alternating stacks of silicon (Si) and silicon-germanium (SiGe). In this approach, Si and SiGe films are deposited alternately, after which the SiGe layers must be precisely etched away, leaving gaps between the remaining Si layers for constructing word lines, bit lines, and gates. Lateral selective etching in high-aspect-ratio structures is a known industry challenge, prone to two types of defects: first, insufficient etch selectivity can damage the silicon skeleton; second, microloading effects cause reaction byproducts and impurities to accumulate at the bottom, leading to severe non-uniformity across layers. To address this, NAURA designed a two-step cyclic etching process. In the first step, charge-neutral fluorine radicals with zero bias selectively etch the SiGe layers, a reaction with extremely high selectivity for SiGe, while forming a germanium fluoride protective film on the silicon surface to shield it from erosion. In the second step, reactive gases are introduced to clear byproduct deposits at the bottom, ensuring smooth vertical flow of the etching gas and enabling deep penetration.

Data disclosed by NAURA show that the process achieves a SiGe-to-Si etch selectivity ratio exceeding 500:1, meaning SiGe is etched more than 500 times faster than silicon. In interlayer structures 200 nanometers thick, silicon loss per cycle is controlled to within 10 angstroms (1 nanometer). Additionally, the process achieves over 95% structural uniformity across stacks of 64 alternating layers, with the bottommost structure retaining a thickness of at least 190 nanometers, effectively eliminating the problem of uneven deep etching.