Huawei's He Tingbo Publishes Third Tao's Law Paper With Kirin 2026 Power Data
Huawei semiconductor chief He Tingbo released a third update of her Tao's Law paper on September 4, disclosing measured data for the Kirin 2026 chip. The paper reports a 55% increase in transistor density while cutting power consumption by 66%, 58%, and 41% for the neural processor, graphics processor, and CPU performance cores, respectively, at equivalent performance. It explains how logic folding reduces interconnect energy, addressing power and heat concerns.
He Tingbo, president of Huawei's semiconductor business unit, published an updated paper on September 4 on ChinaXiv, the Chinese Academy of Sciences' preprint platform, disclosing measured data for the Kirin 2026 chip. This marks the third revision of the Tao's Law paper in under four months, following the initial release on May 25 and a second update in July. The latest version focuses on how logic folding technology affects the chip's power consumption and heat generation, using measured Kirin 2026 data to illustrate its effects. The paper states that the chip increases transistor density while reducing power consumption at equivalent performance levels.
The paper notes that conventional wisdom holds that stacking more active transistors vertically increases power density per unit area, intensifying heat dissipation pressure. However, Kirin 2026 tests show that higher transistor density does not necessarily lead to higher power consumption. According to the paper, the Kirin 2026 achieves a 55% increase in transistor density, and at equivalent performance, power consumption drops by 66% for the neural network processor, 58% for the graphics processor, and 41% for the CPU performance cores.
He Tingbo explains in the paper that much of a modern chip's energy consumption comes not from transistor computation but from data and signal transmission within the chip. Logic folding converts long-distance interconnects that run along a plane into short vertical connections between layers, shortening signal paths and reducing interconnect capacitance and energy use. The paper stresses, however, that adopting logic folding does not guarantee that a stacked chip will be more power-efficient.
For decades, the semiconductor industry has improved chip performance mainly by shrinking transistor dimensions and increasing integration density, but this path now faces multiple challenges, including physical limits, technical difficulty, and rising costs. Huawei proposed Tao's Law in May 2026 to explore technology development paths beyond conventional manufacturing processes. In the July second-edition paper, He Tingbo noted that compared with the Kirin 9030 Pro launched in 2025, the new Kirin chip planned for release in autumn 2026 would have transistor density increased by more than 50%.
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