Nvidia Locks TSMC A16 for Feynman GPU, 2028 Mass Production with Backside Power and 3D Packaging

Nvidia has begun development of the prototype for its next-generation GPU microarchitecture, codenamed "Feynman," which will succeed the "Rubin" and "Rubin Ultra" series.

The Feynman GPU will leverage the backside power delivery technology of the A16 process, combined with several advanced packaging solutions, including SoIC-based 3D chiplet stacking, CoWoS-L 2.5D integration, and next-generation panel-level packaging. Initially, multiple chiplets are planned to be vertically stacked into a single package via SoIC to shorten data transmission paths between chips and reduce latency.

Such custom memory may adopt base dies with integrated specific logic functions, such as memory controllers or packet processing units, enabling some data to be pre-processed before entering memory, thereby improving overall transmission and computational efficiency.

Interconnect technology will be key to further scaling performance on the Feynman platform. Nvidia plans to introduce co-packaged optics (CPO) technology, deploying optical interconnects between GPUs to reduce the latency and power consumption pressures of traditional copper interconnects. These plans are still at an early R&D information stage, with specific product specifications, timelines, and actual deployment to be confirmed by Nvidia and TSMC. Nvidia aims to begin mass production of the Feynman GPU in 2028.