Huawei Unveils Kirin Chip with Logic Folding, Matching TSMC 3nm Density; Mate 90 Series Due in September

Huawei's new Kirin chip is the first to adopt logic folding technology, with equivalent transistor density reaching the level of TSMC's 3nm process. This technology breaks the physical boundaries of traditional planar layouts at the circuit level, shortening the routing length of critical paths and reducing resistance and capacitive loads during signal propagation, thereby achieving a substantial improvement in transistor density and circuit performance. At the chip level, through a full-stack collaborative design of software, architecture, and chip, fine-grained control of instruction and data streams based on actual workloads improves system-level parallelism and efficiency, shortening end-to-end execution time.

According to Huawei's roadmap, by 2031, high-end chips based on this technology will achieve transistor density equivalent to a 1.4nm process. The chip is named the Taoding Law Kirin chip, and the Huawei Mate 90 series, powered by this chip, is scheduled for official release in September.