MediaTek Unveils Dimensity 9600 Pro on TSMC 2nm With 33 Billion Transistors

On September 15, 2026, MediaTek officially launched its next-generation flagship chip, the Dimensity 9600 Pro, at its 2026 Dimensity flagship product launch event. The chip is manufactured on TSMC's 2nm process and contains more than 33 billion transistors. It adopts a "fusion computing architecture" that combines CPU, GPU, NPU, ISP and other heterogeneous computing cores at the software and hardware levels, with AI capabilities as the core engine. The chip uses an all-big-core architecture with dual ultra-large cores, and features AI computing power intelligent scheduling and intelligent memory scheduling technologies, supporting parallel operation of AI and apps.

In terms of specifications, the Dimensity 9600 Pro has two C2-Ultra ultra-large cores at 4.55GHz, three C2-Pro large cores at 4.35GHz and three C2-Pro large cores at 3.1GHz, with 34.5MB of L2, L3 and system cache, and supports LPDDR6 memory and UFS 5.0 flash storage. Compared with the Dimensity 9500, its ultra-large core power consumption is down 37% and multi-core power consumption is down 61%. Benchmark data shows the Dimensity 9600 Pro scored 4,276 single-core and 12,650 multi-core; the previous-generation Dimensity 9500 scored 3,666 single-core and 11,014 multi-core. On that basis, the Dimensity 9600 Pro delivers roughly 17% higher single-core performance and about 15% higher multi-core performance.

On the NPU side, the Dimensity 9600 Pro uses a dual-NPU architecture and carries the APU 1090 AI processor, doubling INT4 computing capability, raising peak performance by 51% and increasing tokens generated per watt by 55%. The chip also includes an ultra-energy-efficient NPU that supports ultra-low-power always-on sensing, cutting power consumption by 40%, and supports a new generation of large-model compression technology and local acceleration of MoE large models. MediaTek also announced that it has ranked first in global smartphone SoC market share for six consecutive years.